(1) Field of the Invention
This invention relates to a method of filling trenches for shallow trench isolation which avoids dishing at the top of the trenches. More particularly the invention relates to a method of filling trenches with a dielectric which is formed at a greater rate within the trench than outside of the trench.
(2) Description of the Related Art
U.S. Pat. No. 5,399,389 to Hieber et al. describes a method of planarizing SiO.sub.2 layers deposited on structured silicon substrates. The method uses differential growth rates of SiO.sub.2 over metallization regions and regions without metallization to eventually achieve a step free film.
U.S. Pat. No. 5,674,783 to Jang et al. describes a method of improving the chemical mechanical polishing uniformity of insulator layers. A substrate has various regions. Some of the regions are masked and exposed regions are treated with a plasma capable of modifying the exposed region so that the insulator grows on the treated region at a faster rate. Other regions can be subsequently exposed to affect the insulator growth rate in other regions.
U.S. Pat. No. 5,492,858 to Bose et al. describes a method of forming trenches for shallow trench isolation in which the trenches are coated with a silicon nitride protective layer before the trenches and active area mesas are coated with a layer of silicon oxide. The silicon oxide is then steam annealed and the wafer is etched and polished down to the tops of the mesas.
U.S. Pat. No. 5,447,884 to Fahey et al. describes a method of forming trenches for shallow trench isolation wherein the trenches are lined with a silicon nitride liner.
U.S. Pat. No. 4,576,834 to Sobczak describes a method of forming trench isolation structures utilizing the conversion of an organosilicon material to silicon oxide.